Alexander Schwarz: Exploring Hardware Cache Influence on Plan-Based Scheduling

Efficient utilization of available resources is a crucial aspect in High Performance Computing (HPC). Scheduling of tasks over a given time frame as well as mapping of resources to achieve the lowest possible execution time are two major challenges. A variety of different proposed solutions exist that aim to find the most suitable solution to the scheduling and mapping problem. One of these is the so called plan-based scheduler, under which this thesis explores potential ways to allocate memory (i.e. map resources) in order to achieve higher Central Processing Unit (CPU) cache utilization. This is achieved via improving locality of data that in turn is realized by pre-allocating sufficient memory prior to task execution based on the plan supplied by the plan-based scheduler. Multiple attempts to implement a prototype inside the Linux kernel’s memory allocation process are presented of which one showed small but measurable improvements in cache utilization. This serves as a proof of concept, demonstrating that a tailored memory allocation to the plan-based scheduler can improve performance. These findings highlight the feasibility of integrating memory allocation strategies that are aware of the context they are executed in to optimize cache utilization and open up new research opportunities to further investigate optimal circumstances in regard to a customized memory allocation in the context of a plan-based scheduler.